Lenovo 44E5134 Processor Computer Component

The Dual-Core Intel® Xeon® Processor 5200 Series is a server/workstation processor utilizing two 45-nm Hi-k next generation Intel® Core™ microarchitecture cores. The processor is manufactured on Intel’s 45 nanometer process technology combining high performance with the power efficiencies of a low-power microarchitecture. The Dual-Core Intel® Xeon® Processor 5200 Series maintains the tradition of compatibility with IA-32 software. Some key features include on-die, primary 32-kB instruction cache and 32-kB write-back data cache in each core and 6 MB Level 2 cache with Intel® Advanced Smart Cache architecture. The processors’ Data Prefetch Logic speculatively fetches data to the L2 cache before an L1 cache requests occurs, resulting in reduced effective bus latency and improved performance. The 1333 MHz Front Side Bus (FSB) is a quad-pumped bus running off a 333 MHz system clock making 10.66 GBytes per second data transfer rates possible. The 1600 MHz Front Side Bus (FSB) is a quadpumped bus running off a 400 MHz system clock making 12.80 GBytes per second data transfer rates possible.
Enhanced thermal and power management capabilities are implemented including Intel® Thermal Monitor 1, Intel® Thermal Monitor 2 and Enhanced Intel SpeedStep® Technology. These technologies are targeted for dual processor configurations in enterprise environments. Intel® Thermal Monitor 1 and Intel® Thermal Monitor provide efficient and effective cooling in high temperature situations. Enhanced Intel SpeedStep Technology provides power management capabilities to servers and workstations.
Dual-Core Intel® Xeon® Processor 5200 Series features include Intel® Wide Dynamic Execution, enhanced floating point and multi-media units, Streaming SIMD Extensions 2 (SSE2), Streaming SIMD Extensions 3 (SSE3), and Streaming SIMD Extensions 4.1 (SSE4.1). Advanced Dynamic Execution improves speculative execution and branch prediction internal to the processor. The floating point and multi-media units include 128-bit wide registers and a separate register for data movement. SSE3 instructions provide highly efficient double-precision floating point, SIMD integer, and memory management operations.